SPLD, 20-Pin DIP Package
Stock Quantity: 105
Selling Unit: Each
| Quantity | Price (ex VAT) |
|---|---|
| 1+ | 2.92 |
| 10+ | |
| 50+ | |
| 100+ |
105 in stock
The PALCE16V8H-25PC/4 is a high-performance, electrically erasable programmable logic device (EEPLD) manufactured by Lattice Semiconductor. It is implemented in a 20-pin dual in-line package (DIP) suitable for through-hole mounting. This SPLD features a programmable AND array and a fixed OR array, allowing for the implementation of custom logic functions. The “16V8” designation indicates a macrocell architecture with 16 inputs and 8 outputs, each of which can be individually configured as input, output, or registered output with feedback. The “-25” suffix denotes a propagation delay of 25 nanoseconds, representing the maximum time from input change to valid output. The “/4” likely signifies a specific temperature grade or minor revision, potentially indicating an industrial temperature range (-40°C to +85°C), though further documentation is needed to confirm this. The device operates on a 5V power supply and is programmed via a standard PLD programmer using JEDEC files.