M5-128/120-10YC-12YI – LATTICE SEMI

The Lattice M5-128/120-10YC-12YI designates a high-performance, erasable programmable logic device (EPLD) from the ispLSI 1000 family. It features 128 macrocells arranged in a flexible architecture, allowing for complex logic implementations. The “/120” likely refers to a user-configurable I/O pin count or a specific I/O configuration option within the 128 macrocell design. The “-10” suffix denotes a 10ns propagation delay, indicating the maximum time for a signal to propagate through the device. The “YC” and “YI” likely specify package type and temperature range, respectively; “YC” potentially indicates a ceramic leaded chip carrier (CLCC) package, while “YI” may represent an industrial temperature range (-40°C to +85°C). The device operates on a 5V power supply and supports in-system programmability (ISP) for design iterations and field upgrades.